3S-Smart Software announces enhanced PLC application performance for CODESYS tool

January 8, 2018 - Due to the capabilities of the IEC 61131-3 system CODESYS, the tool is used increasingly for power-hungry PLC applications. The CODESYS system offers the possibility to divide the code into different tasks and process them with independent cycle times.

Manufacturers of automation devices can now offer their customers the functionality to manually distribute the various tasks of the PLC application to symmetrical processor cores of the control CPU in CODESYS. Parallel processing is designed to increase the execution speed while utilizing the available processor power - and the user retains control over the timing. Controls with operating systems such as Linux or Windows perform such a distribution themselves, but the resulting time behavior is difficult to estimate in individual cases.

To use the multicore implementation in CODESYS, the user can assign the desired CPU core to task groups of his PLC application. For more complex configurations, available coding guidelines help. At the same time, the CODESYS Control runtime system solves the problem of data consistency during data storage and access with the appropriate software, for example to prevent frequent blockages by multiple reader/single writer or to enable atomic accesses to data types up to 64 bits.

Multicore support could bring performance benefits in many applications. A complex PLC logic, for example, can be divided into different independent task groups and CPU cores. In addition, the logic application can be separated from communication and additional functions such as motion, CNC, or visualization.
At the CODESYS booth on the "embedded world" in Hall 4, Stand 307, users and device manufacturers can see for themselves how the function operates and performs.

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