Microchip Technology introduces META-DX1 family of Ethernet Physical-Layer (PHY) devices | Automation.com

Microchip Technology introduces META-DX1 family of Ethernet Physical-Layer (PHY) devices

Microchip Technology introduces META-DX1 family of Ethernet Physical-Layer (PHY) devices

June 3, 2019 — Microchip Technology, via its Microsemi subsidiary, announced its META-DX1 family of Ethernet Physical-Layer (PHY) devices that integrate, onto a single chip, Ethernet ports from 1 Gigabit Ethernet (GbE) to 400 GbE, flexible Ethernet (FlexE), Media Access Control Security (MACsec) link encryption and nanosecond timestamping accuracy at terabit capacity. 

The META-DX1 MACsec engine secures traffic leaving the data center or enterprise premises, and FlexE enables both cloud and telecom service providers to meet capacity requirements while reducing fiber plant capital expenditures by optimally configuring links beyond today’s fixed-rate Ethernet so they can use optics. The META-DX1 family combines MACsec and FlexE into one solution to meet the next phase of capacity scaling in data center interconnect (DCI) buildouts. Further differentiating META-DX1, its integrated flexible crosspoint switching capability makes it easier for OEMs to navigate the market transition from 25 Gbps NRZ and 56 Gbps PAM-based architectures by enabling them to support a single design or SKU for both 100 GbE (QSFP28) and 400 GbE (QSFP-DD) optics. By providing timestamping with nanosecond-level accuracy on every port, META-DX1 also ensures network buildouts will meet the challenging timing requirements of 5G mobile base station deployments.  

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