- August 08, 2017
August 8, 2017 — Abaco today announced an upgraded version of its AXISLib signal processing and math libraries for Intel-based system architectures. The enhancements are designed to help developers of high intensity, mission critical applications such as radar and signals intelligence to achieve performance from the underlying hardware. AXISLIB is part of Abaco’s AXIS software development environment for HPEC (high performance embedded computing) applications. The new release delivers double the performance of the previous version of AXISLib for 32 point FFTs. This can be vital for radar applications such as pulse compression and other compression- and pattern matching algorithms.
AXISLib 2.6 enables users of Abaco’s SBC347D – based on the Intel Xeon-D processor - as well as Abaco’s entire family of platforms based on latest generation Intel Core i7 processors - to take advantage of the performance these processors.
AXISLib provides architecture-agnostic, optimized signal processing and math libraries that utilize the underlying SIMD acceleration unit in the CPU without requiring the developer to explicitly optimize code. It includes over 600 functions with a choice of API, and performance algorithms can be developed with minimal effort, and that are portable across different operating systems. The library supports multi-core threading, so algorithms can run on a single CPU core or be scaled across multiple CPU cores on an Intel device for parallel processing.
AXIS - Advanced Multiprocessor Integrated Software - is a set of software modules that can be used to accelerate the design, development, testing and deployment of complex DSP and multiprocessing platforms for real-time applications such as radar, sonar, communications and image processing.