- March 31, 2017
March 31, 2017‚îÄPentek introduced amember of the Jade family of data converter XMC modules. The Model 71851 is based on the Xilinx Kintex Ultrascale FPGA and features two 500 MHz, 12-bit A/Ds with multiband digital down converters (DDCs), one digital upconverter (DUC) and two 800 MHz 16-bit D/As.
The Model 71851 offers a 200 MHz bandwidth on both the receive-side and on the transmit-side, which provides the complimentary solution necessary in many data acquisition, waveform generation, communications, satcom, UAV and radar applications.
One application, requiring bandwidth signal generation and capture is a ground penetrating radar system that can detect hazards hidden below the surface. The Model 71851 can be used in a low altitude aircraft or UAV as the front-end to this type of system. The Model 71851 has the bandwidth and processing power necessary to create signals that can penetrate the ground and then capture return signals while allowing the aircraft to fly at a safe travelling velocity to eliminate detection.
The front end accepts two analog HF or IF inputs on front panel SSMC connectors with transformer-coupling into two Texas Instruments ADS5463 500 MHz, 12-bit A/D converters. Optionally, a Texas Instruments ADS5474 400 MHz, 14-bit A/D may be factory-installed instead of the ADS5463 for those that need better resolution. The digital outputs are delivered into the Kintex UltraScale FPGA for signal-processing, data capture and routing to other module resources.
A TI DAC5688 DUC (digital upconverter) and D/A accepts a baseband real or complex data stream from the FPGA and provides that input to the upconvert, interpolate and dual D/A stages. Two internal timing buses provide either a single clock or two different clock rates to the A/D and D/A signal paths.
The Model 71851 features two A/D Acquisition IP modules for capturing and moving data. Each module can receive data from any of the two A/Ds or a test signal generator. Linked-list DMA engines move the A/D data through the PCIe interface in a unique Acquisition Gate Driven mode. In this mode, the length of a transfer performed by a link definition need not be known prior to data acquisition; rather, it is governed by the length of the acquisition gate. This is useful in applications where an external gate drives acquisition and the exact length of that gate is not known or is likely to vary. Within each A/D Acquisition IP Module is a DDC IP core. Because of the input routing of the A/D Acquisition IP Modules, many different configurations can be achieved including one A/D driving both DDCs or each of the two A/Ds driving its own DDC.
The Model 71851 factory-installed functions include a D/A Waveform Playback IP module. Customers can generate waveforms stored in either on-board memory or host memory for both D/As. Programmable parameters including length of waveform, delay from playback trigger, waveform repetition, etc. are fully supported with a minimum of programming.
The Model 71851 XMC module is designed to operate with a range of carrier boards in PCIe, 3U & 6U VPX, AMC, and 3U & 6U CompactPCI form factors, with versions for both commercial and rugged environments.