JTAG and ECT announce co-operation on tester integration | Automation.com

JTAG and ECT announce co-operation on tester integration

JTAG and ECT announce co-operation on tester integration

September 1, 2016 -- JTAG Technologies announced a co-operation with Everett Charles Technologies (ECT). JTAG and ECT have just completed a successful integration of their JT 5705/FXT multi-function JTAG tester into the small linear series of cassette-based re-configurable fixtures.

The JT 5705/FXT is a compact single-board test system that supports analog measurement and stimulus, frequency measurements, digital I/O,  boundary-scan testing (via  two TAPs) and also in-system device programming – the latest JTAG software also includes multiple controller support that allows the linking of  multiple units to create a homogeneous system of increased channel counts. Within the fixture The JT 5705/FXT cards mount on purpose built carriers featuring the ATE industry standard 208-pin ‘Pylon’ connectors.

Many new electronic designs feature some devices such as programmable logic and micro-controllers/SOCs that feature JTAG, however due to mixed signal nature of most of these designs it is useful to have mix of test signals to provide analog stimuli and measurement, digital I/O channels and so on. The JT 5705/FXT provides just these features.

In the ECT small linear series access to the Unit Under Test (UUT) is provided through spring probes/nails that are part of a ‘swappable’ interface module often referred to as a cassette. The cassette links the resources within the fixture-tester (power, tester signals, auxiliary instruments etc) to the UUT. By swapping cassettes different board types can be tested on the same base hardware  - providing a cost effective solution especially for high-mix low series volume organisations. What’s more customisation of the tester’s FPGA kernel allows users to develop their own digital I/O options such as CAN bus, counter/timer  or high-speed memory access. IP from sharing sites such as Open Cores can be implemented in the FPGA fabric and accessed via JTAG Technologies’ own CoreCommander FPGA translator module.

Background

As the boundary-scan market expands beyond the traditional high-density digital targets, so the test equipment must evolve to match.  As well as supporting two JTAG (IEEE 1149.x) compatible TAPs with programmable thresholds the JT 5705 unit has extensive I/O capability (64 channels) 8 of which can be defined as analog with a measure and stimulus range of ±16V or 0-32V. Multiple JT 5705s can be ‘linked and sync’ed’ to provide higher TAP and IO channel counts.
 

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