Pentek introduces Model 71131 Jade XMC module | Automation.com

Pentek introduces Model 71131 Jade XMC module

January 232017
Pentek introduces Model 71131 Jade XMC module

January 23, 2017 Pentek introduced the Model 71131, an eight-channel, 250 MHz XMC module featuring 16-bit A/Ds with programmable multiband digital down converters (DDCs).

The Model 71131 is suitable for connection to HF or IF ports of a communications or radar system. Its built-in data capture feature offers a turnkey solution as well as a platform for developing and deploying custom FPGA-processing IP. The eight channels make it especially beneficial for multi-channel phased array platforms in defense and weather radar applications where the cost per channel can be substantially reduced.

The front end accepts eight analog HF or IF inputs on front panel MMCX connectors with transformer coupling into four Texas Instruments ADS42LB69 dual 250 MHz, 16-bit A/D converters. The digital outputs are delivered into the Kintex UltraScale FPGA for signal-processing and routing to other module resources.

The Model 71131 features eight A/D Acquisition IP Modules for easily capturing and moving data. Each IP module can receive data from any of the eight A/Ds or a test signal generator. Powerful linked-list DMA engines move the A/D data through the PCIe interface in a unique Acquisition Gate Driven mode. In this mode, the length of a transfer performed by a link definition need not be known prior to data acquisition; rather, it is governed by the length of the acquisition gate. This is useful in applications where an external gate drives acquisition and the exact length of that gate is not known or is likely to vary.

Within each A/D Acquisition IP Module is a DDC IP core. Because of the flexible input routing of the A/D Acquisition IP Modules, many different configurations can be achieved including one A/D driving all eight DDCs or each of the eight A/Ds driving its own DDC.

Each DDC has an independent 32-bit tuning frequency setting that ranges from DC to the A/D sampling frequency. Each DDC can have its own unique decimation setting, supporting as many as eight different output bandwidths. Decimations can be programmed from 2 to 32,768, delivering bandwidths ranging from 100 MHz down to a few kHz to best suit each application.

The Pentek Jade Architecture is based on the Xilinx Kintex UltraScale FPGA, which raises the digital signal processing (DSP) performance by over 50% with reductions in cost, power dissipation and weight. As the central feature of the Jade Architecture, the FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data packing, gating, triggering and memory control. A 5 GB bank of DDR4 SDRAM is available to the FPGA for custom applications. The Gen.3 x8 PCIe link can sustain 6.4 GB/s data transfers to system memory. Eight additional gigabit serial lanes and LVDS general purpose I/O lines are available for custom solutions.

The Model 71131 XMC module is designed to operate with a wide range of carrier boards in PCIe, 3U & 6U VPX, AMC, and 3U & 6U CompactPCI form factors, with versions for both commercial and rugged environments.
 

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