Sercos releases IP core for Xilinx FPGAs and Zynq SoC family | Automation.com

Sercos releases IP core for Xilinx FPGAs and Zynq SoC family

Sercos releases IP core for Xilinx FPGAs and Zynq SoC family

May 7, 2015 - Sercos International announced the Sercos III IP Core for Xilinx 7 series FPGAs and devices of the Zynq SoC family. The IP core is available for Sercos III master and slave controllers. It includes all hardware functions, such as timing, synchronization and processing of cyclic and non-cyclic data on the basis of two integrated Ethernet MACs.

Sercos III master and slave devices can be implemented as a single chip solution using either Xilinx Artix-7 FPGAs, other FPGAs of the 7 series or Zynq SoC devices, which integrate an ARM dual-core Cortex-A9 processor.

About Sercos International

Sercos International is an association of users and manufacturers that is in charge of technical development, standardization, certification and marketing for the Sercos automation bus. Conformance tests guarantee that Sercos implementations are standard-compliant, ensuring that devices from different manufacturers can be combined. Based in Germany, the organization presently has more than 90 member companies located around the world and has national liaison offices in North America and Asia. 

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