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Tuning PID Controllers for Integrating Systems Using a Direct Synthesis Method [Technical]

By: ISA Transactions
23 July, 2018
1 min read
Tuning PID Controllers for Integrating Systems Using a Direct Synthesis Method [Technical]
Tuning PID Controllers for Integrating Systems Using a Direct Synthesis Method [Technical]
Research presents a new design for a PID controller with a lead lag filter using multiple dominant pole placement method.

This post is an excerpt from the journal ISA Transactions. All ISA Transactions articles are free to ISA members, or can be purchased from Elsevier Press .

Abstract:

A PID controller is designed for various forms of integrating systems with time delay using direct synthesis method. The method is based on comparing the characteristic equation of the integrating system and PID controller with a filter with the desired characteristic equation. The desired characteristic equation comprises of multiple poles which are placed at the same desired location. The tuning parameter is adjusted so as to achieve the desired robustness. Tuning rules in terms of process parameters are given for various forms of integrating systems.

The tuning parameter can be selected for the desired robustness by specifying Ms value. The proposed controller design method is applied to various transfer function models and to the nonlinear model equations of jacketed CSTR to show its effectiveness and applicability.

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