September 26, 2018 — Microchip Technology introduced a 16-bit Digital Signal Controller (DSC) designed to deliver deterministic performance in time-critical control applications. The dsPIC33CK DSC has expanded context-selected registers to reduce interrupt latency and instruction execution to accelerate Digital Signal Processor (DSP) routines. This dsPIC33CK single core family complements the recently announced dsPIC33CH dual core family based on the same core.
With 100 MIPS performance, the core is suited for motor control, digital power and other applications requiring sophisticated algorithms such as automotive sensors and industrial automation. It has been designed specifically for controlling multiple sensorless, brushless motors running field-oriented control algorithms and power factor correction.
The device includes integrated functional safety features for safety-critical designs such as: RAM Built-In Self-Test (BIST) for checking RAM health and functionality; Deadman Timer for monitoring the health of application software through periodic timer interrupts within a specified timing window; Dual Watchdog Timers (WDT); Flash Error Correction Code (ECC); Brown Out Reset (BOR); Power On Reset (POR); and Fail Safe Clock Monitor (FSCM).
The dsPIC33CK family features a CAN-FD communication bus to support automotive communication standards. It comes with analog integration including ADCs (3.5 Msps), analog comparators with DACs, and operational amplifiers. The MCUs include a 250-ps resolution PWM which equivalent to 4 GHz carrier frequency for advanced digital power topologies. Live Update of firmware (with up to 2x128 KB blocks) is also offered to support high-availability systems, especially important for digital power supplies.
